(a) Field of the Invention
The present disclosure relates to a contact structure for a semiconductor device as well as for a thin film transistor array substrate of a liquid crystal display, and a method of fabricating the same.
(b) Description of Related Art
Generally, as a semiconductor device becomes integrated, the semiconductor device is optimized in its area while bearing a multi-layered wiring line assembly together with an insulating layer. To minimize interference of the signals transmitted through the wiring line assembly, the insulating layer is formed with a low dielectric material. Contact holes are formed at the insulating layer, and the wiring lines involving the same signal are electrically connected to each other through the contact holes. In the contact hole formation process based on etching, an undercut is liable to be made at the contact area while weakening the step coverage of the contact structure. Furthermore, the wiring line assembly placed over the insulating layer may be deformed in its profile, or cut at the contact area.
Meanwhile, a liquid crystal display, one of the most widely used flat panel displays, has two substrates with electrodes, and a liquid crystal layer sandwiched between the substrates. Voltages are applied to the electrodes so that the liquid crystal molecules in the liquid crystal layer are re-oriented to sic) thereby control the light transmission.
One of the substrates is provided with thin film transistors for switching the voltages applied to the electrodes, and usually called the “thin film transistor array substrate.” The thin film transistor array substrate further includes gate lines for carrying scanning signals, data lines crossing over the gate lines to carry picture signals, gate and data pads for receiving scanning signals and picture signals from the outside and transmitting them to the gate and the data lines, and pixel electrodes formed at the pixel regions defined by the gate and the data lines while being connected to the thin film transistors.
To obtain improved picture quality of the display device, the opening or aperture ratio of the pixels should be enhanced as much as possible. For that purpose the wiring line assembly and the pixel electrodes are overlapped with each other while interposing an insulating layer. The insulating layer is formed with a low dielectric organic material to minimize interference of the signals transmitted through the wiring line assembly.
A method of fabricating the thin film transistor array substrate involves a process of exposing the pads for receiving the required signals from the outside, or a process of exposing the portions of the wiring lines to be in contact with other wiring line portions. When a target layer is etched using the overlying insulating layer with contact holes as a mask, while not etching the insulating layer such that the insulating layer bears a sufficient thickness, it is seriously undercut at the contact area while weakening the step coverage thereof. In this case, the overlying insulating layer may be deformed in its profile, or cut at the contact area. To solve such a problem, the sidewall of the contact hole may be formed with a stepped shape. However, in this case, the organic insulating layer should suffer several photolithography processes, and this complicates the relevant processing steps.